Yousef's Notes
/
Comp. Arch.
Architecture
Advanced Instruction Sets
AI Accelerator
Arithmetic Logic Unit (ALU)
ASIC
Assembly
Bare Metal
BIOS
Booting
Bootloader
Buses
C Compiler Structure
Cache
Co-Processors
Components of a Computer
Containers
CPU
Crypto Processors
Das U-Boot
Direct Memory Access (DMA)
Directive vs Instruction
DRAM
Firmware
FPGA
GPU
Heap
History and Evolution of Computer Architectures
Instruction Set
Interrupt
Low-level Routine
Memory
Microprocessor
Parallelism
Peripheral Component Interconnect (PCI) Bus
Peripherals
Pipeline
PLC
Raspberry Pi
Registers
Shader
SRAM
Stack
Subroutines
Thumb Directive
Trusted Platform Module
UEFI
UF2 Bootloaders
Virtual Machines and Bytecode
Virtualization Technologies
Networking
Basic Concepts
Ethernet
Internet History
IP Protocol
OSI Model
Ports
Protocol
SSL-TLS
Subnetting
Transmission Control Protocol (TCP)
Untitled
User Datagram Protocol (UDP)
Operating Systems
Cgroups
Completely Fair Scheduler
Concurrent Programming
Deadlocks
Device Management
Filesystem
Inter-Process Communication
Livelocks
Memory Management
Memory-Mapped Files
Message Queues
Monitors
Mutexes
Operating System
Paging
Pipes
POSIX Threads Management
Process
Process Control Block
Process Synchronization
Race Conditions
Scheduling
Segmentation
Semaphores
Shared Memory
Signals
Sockets
Starvation
Thread
Unix and Linux
Unix Kernel
Virtual Memory
Untitled
Untitled
Transmission Control Protocol (TCP)
User Datagram Protocol (UDP)
Test yourself on
QuizBuilder.ai
Transmission Control Protocol (TCP)